Micro-Structural and Nano-Technology

Citations to U.S. patents by U.S. patents granted in 2021

Related WIPO fields:[Semiconductors | Measurement | Materials, metallurgy | Optics | Electrical machinery, apparatus, energy | Basic materials chemistry | Chemical engineering]  All WIPO fields

  1. 7 10490559    Gate formation scheme for nanosheet transistors having different work function metals and different nanosheet width dimensions
  Inventors: Takashi Ando; Ruqiang Bao; Pouya Hashemi; Choonghyun Lee

  1. 7 9362355    Nanosheet MOSFET with full-height air-gap spacer
  Inventors: Kangguo Cheng; Bruce B. Doris; Michael A. Guillorn; Xin Miao

  1. 7 9997519    Dual channel structures with multiple threshold voltages
  Inventors: Ruqiang Bao; Michael A. Guillorn; Vijay Narayanan

  4. 6 10014390    Inner spacer formation for nanosheet field-effect transistors with tall suspensions
  Inventors: Guillaume Bouche; Julien Frougier; Ruilong Xie

  5. 5 10103238    Nanosheet field-effect transistor with full dielectric isolation
  Inventors: Hui Zang; Tek Po Rinus Lee; Haigou Huang; Ruilong Xie; Min Gyu Sung; Chanro Park

  6. 4 10008583    Gate-all-around nanosheet field-effect transistors and methods of manufacturing the same
  Inventors: Mark S. Rodder; Joon Goo Hong

  6. 4 10243061    Nanosheet transistor
  Inventors: Kangguo Cheng; Juntao Li; Heng Wu; Peng Xu

  6. 4 9224810    CMOS nanowire structure
  Inventors: Seiyon Kim; Kelin J. Kuhn; Tahir Ghani; Anand S. Murthy; Annalisa Cappellani; Stephen M. Cea; Rafael Rios; Glenn A. Glass

  6. 4 9653289    Fabrication of nano-sheet transistors with different threshold voltages
  Inventors: Karthik Balakrishnan; Kangguo Cheng; Pouya Hashemi; Alexander Reznicek

  6. 4 9837414    Stacked complementary FETs featuring vertically stacked horizontal nanowires
  Inventors: Karthik Balakrishnan; Kangguo Cheng; Pouya Hashemi; Alexander Reznicek

  6. 4 9947804    Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structure
  Inventors: Julien Frougier; Min Gyu Sung; Ruilong Xie; Chanro Park; Steven Bentley

  6. 4 9954058    Self-aligned air gap spacer for nanosheet CMOS devices
  Inventors: Shogo Mochizuki; Alexander Reznicek; Joshua M. Rubin; Junli Wang

  1. 66 9236267    Cut-mask patterning process for fin-like field effect transistor (FinFET) device
  Inventors: Ho Wei De; Kuei-Liang Lu; Ming-Feng Shieh; Ching-Yu Chang

  1. 66 9576814    Method of spacer patterning to form a target integrated circuit pattern
  Inventors: Chieh-Han Wu; Cheng-Hsiung Tsai; Chung-Ju Lee; Ming-Feng Shieh; Ru-Gun Liu; Shau-Lin Shue; Tien-I Bao

  3. 64 9520482    Method of cutting metal gate
  Inventors: Po-Chin Chang; Chih-Hao Wang; Kai-Chieh Yang; Shih-Ting Hung; Wei-Hao Wu; Gloria Wu; Inez Fu; Chia-Wei Su; Yi-Hsuan Hsiao

  4. 44 9502265    Vertical gate all around (VGAA) transistors and methods of forming the same
  Inventors: Ching-Hong Jiang; Li-Ting Wang; Teng-Chun Tsai; Shih-Chiang Chen

  4. 44 9536738    Vertical gate all around (VGAA) devices and methods of manufacturing the same
  Inventors: Yu-Lien Huang; Chun-Hsiung Lin; Chi-Wen Liu

  4. 44 9608116    FINFETs with wrap-around silicide and method forming the same
  Inventors: Kuo-Cheng Ching; Ching-Wei Tsai; Chi-Wen Liu; Chih-Hao Wang; Ying-Keung Leung

  7. 32 9209247    Self-aligned wrapped-around structure
  Inventors: Jean-Pierre Colinge; Kuo-Cheng Ching; Ta-Pen Guo; Carlos H. Diaz

  8. 29 9412817    Silicide regions in vertical gate all around (VGAA) devices and methods of forming same
  Inventors: Kai-Chieh Yang; Wai-Yi Lien

  8. 29 9412828    Aligned gate-all-around structure
  Inventors: Kuo-Cheng Ching; Jean-Pierre Colinge; Zhiqiang Wu

  10. 28 9472618    Nanowire field effect transistor device having a replacement gate
  Inventors: Richard Kenneth Oxland

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