(Weighted Score) Semiconductors

Citations to U.S. patents by U.S. patents granted in 2024

Related WIPO fields:[Electrical machinery, apparatus, energy | Audio-visual technology | Surface technology, coating | Computer technology | Optics | Measurement | Micro-structural and nano-technology]  All WIPO fields

  1. Weighted Score: 4.594 9548366    Self aligned contact scheme
  Inventors: Tsai-Jung Ho; Kuang-Yuan Hsu; Pei-Ren Jeng

  2. Weighted Score: 4.500 10483253    Display with embedded pixel driver chips
  Inventors: Hsin-Hua Hu

  3. Weighted Score: 4.167 10163798    Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same
  Inventors: Amruthavalli Pallavi Alur; Sri Ranga Sai Boyapati; Robert Alan May; Islam A. Salama; Robert L. Sankman

  4. Weighted Score: 4.000 9865598    FinFET with uniform shallow trench isolation recess
  Inventors: Zhenxing Bi; Kangguo Cheng; Juntao Li; Peng Xu

  5. Weighted Score: 3.833 10510620    Work function metal patterning for N-P space between active nanostructures
  Inventors: Daniel Chanemougame; Steven R. Soss; Steven Bentley; Julien Frougier; Ruilong Xie

  6. Weighted Score: 3.500 8563403    Three dimensional integrated circuit integration using alignment via/dielectric bonding first and through via formation last
  Inventors: Mukta G. Farooq; Spyridon Skordas; Richard P. Volant; Kevin R. Winstel

  6. Weighted Score: 3.500 9653428    Semiconductor package and fabricating method thereof
  Inventors: David Jon Hiner; Michael Kelly; Ronald Patrick Huemoeller

  6. Weighted Score: 3.500 9954058    Self-aligned air gap spacer for nanosheet CMOS devices
  Inventors: Shogo Mochizuki; Alexander Reznicek; Joshua M. Rubin; Junli Wang

  9. Weighted Score: 3.000 10243053    Gate contact structure positioned above an active region of a transistor device
  Inventors: Ruilong Xie; Andre P. Labonte; Chanro Park

  9. Weighted Score: 3.000 11482270    Pulsing scheme for a ferroelectric memory bit-cell to minimize read or write disturb effect and refresh logic
  Inventors: Rajeev Kumar Dokania; Amrita Mathuriya; Sasikanth Manipatruni

  9. Weighted Score: 3.000 5641054    Magnetic levitation conveyor apparatus
  Inventors: Satoshi Mori; Masao Matsumura; Yoichi Kanemitsu; Takeshi Yoshioka; Masaaki Kajiyama; Fumio Kondo; Yuji Shirao; Masato Eguchi; Hiroyuki Shinozaki; Yukio Ikeda; Masayoshi Hirose; Masaru Nakaniwa; Norio Kimura; Katsuaki Usui; Katsuyuki Aoki

  9. Weighted Score: 3.000 6437449    Making semiconductor devices having stacked dies with biased back surfaces
  Inventors: Donald C. Foster

  9. Weighted Score: 3.000 6703703    Low cost power semiconductor module without substrate
  Inventors: William Grant

  9. Weighted Score: 3.000 9722063    Protective insulator for HFET devices
  Inventors: Alexey Kudymov; Linlin Liu; Xiaohui Wang; Jamal Ramdani

  1. Weighted Score: 35.771 9236267    Cut-mask patterning process for fin-like field effect transistor (FinFET) device
  Inventors: Ho Wei De; Kuei-Liang Lu; Ming-Feng Shieh; Ching-Yu Chang

  2. Weighted Score: 35.369 9520482    Method of cutting metal gate
  Inventors: Po-Chin Chang; Chih-Hao Wang; Kai-Chieh Yang; Shih-Ting Hung; Wei-Hao Wu; Gloria Wu; Inez Fu; Chia-Wei Su; Yi-Hsuan Hsiao

  3. Weighted Score: 34.603 9576814    Method of spacer patterning to form a target integrated circuit pattern
  Inventors: Chieh-Han Wu; Cheng-Hsiung Tsai; Chung-Ju Lee; Ming-Feng Shieh; Ru-Gun Liu; Shau-Lin Shue; Tien-I Bao

  4. Weighted Score: 24.726 9372206    Testing of semiconductor chips with microbumps
  Inventors: Wei-Cheng Wu; Hsien-Pin Hu; Shang-Yun Hou; Shin-Puu Jeng; Chen-Hua Yu; Chao-Hsiang Yang

  5. Weighted Score: 24.339 9281254    Methods of forming integrated circuit package
  Inventors: Chen-Hua Yu; Chi-Hsi Wu; Wen-Chih Chiou; Hsiang-Fan Lee; Shih-Peng Tai; Tang-Jung Chiu

  6. Weighted Score: 24.267 9496189    Stacked semiconductor devices and methods of forming same
  Inventors: Chen-Hua Yu; Chien-Hsun Lee; Tsung-Ding Wang; Jung Wei Cheng

  7. Weighted Score: 21.021 7260442    Method and system for mask fabrication process control
  Inventors: Yuh-Fong Hwang; Chen-Yu Chang; Chiech-Yi Kuo; Wen-Yao Chen

  7. Weighted Score: 21.021 9256709    Method for integrated circuit mask patterning
  Inventors: Jue-Chin Yu; Lun Hsieh; Pi-Tsung Chen; Shuo-Yen Chou; Ru-Gun Liu

  9. Weighted Score: 18.163 9105490    Contact structure of semiconductor device
  Inventors: Sung-Li Wang; Ding-Kang Shih; Chin-Hsiang Lin; Sey-Ping Sun; Clement Hsingjen Wann

  10. Weighted Score: 17.950 9236300    Contact plugs in SRAM cells and the method of forming the same
  Inventors: Jhon Jhy Liaw

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